i'm actually losing my mind at my lab assignment i swear i'm not going to be getting it done in time because of this stupid tri-state buffer that i have to do AT THE ANALOG LEVEL
look at this. what the fuck is that. i'm giving the enable line (#2) and the input (#1) their own little cycle right. #4 is supposed to be the INVERSE OF THE ENABLE LINE. #3 IS SUPPOSED TO BE THE OUTPUT
